Maven Silicon offers various Corporate Training Programs for the working professionals. Our design and verification consultants train your engineers on the advanced design and verification methodologies to make them highly productive.
This program is specially designed for Engineers keeping in view the ever changing demands of Industry. The participants are equipped with the latest tools, techniques and skills needed to excel as Verification Engineers.
As learning Services Company, we are fully equipped, to build a learning initiative customized to suit your needs. We can conduct these corporate training programs based on clients’ requirements either at clients’ place (Onsite) or at our Campus (Offsite) for the employees of the organizations. Maven Silicon curriculum, services, and learning experiences are tailored to the individual client's needs, because we have learned that a one-size-fits-all approach does not work for every organization.
Demo Class gives an overview of Universal Verification Methodology, UVM TB architecture, and Reusable VIP using UVM.
Please fill the below form and click “View Demo” to enjoy the online session
Maven delivered us ( Qualcomm ) with an excellent training on "SystemVerilog and UVM for Verification" which was customised to the needs of our organization. The audience was diversified from 2 to 8 years of experience and the course material was designed to address the needs of the varied experience of the audience. Their trainer had in-depth knowledge of course contents. They made sure that all the important concepts of SV and UVM are conveyed in the stipulated time. The labs provided were with appropriate examples which the engineers can apply and use while implementing in live projects. I would definitely recommend more trainings for the different teams at Qualcomm.
Maven has provided us (CYPRESS SEMICONDUCTORS) with an excellent training on "SystemVerilog for Verification" which is tailored to the needs of our organization. They have succeeded in creating training courses which are specific and relevant to the audience of the training – be it NCGs or experts. Their trainers facilitate in a way which allows attendees to interact, while learning skills and knowledge which can be applied to their individual roles. She has also clarified many questions raised with specific and clear answers which was found to be extremely beneficial to the team. We hope to continue receive trainings with the same quality in many more areas.
My team at Sandisk attended the SV and UVM training from Maven. The training was well organized and met the needs of the team with varied experience levels of the audience. Their trainers had very good knowledge on the subject and clarified many questions raised and provided clear answers with patience.
One of the key differentiators was that the sessions were so interesting that none of the 20 attendees missed any of the sessions inspite of project pressures. The labs provided were with apt examples which the engineers can apply and use while implementing in live projects.
"I know Sivakumar as a verification consultant and trainer since nearly 4 years. Also taken his services as a trainer for some of the engineers in our team. He being the main trainer was able to meet the key objectives of making this engineers productive in System Verilog based verification and in UVM. He is very passionate and enthusiastic about his job. Wishing him all the best..."
A training on "SystemVerilog for Verification" was needed for WLAN group of Broadcom Research India Pvt. Ltd. and we found Maven Silicon are the experts in delivered such a training. As in any organization, we also have engineers at various experience level ranging from fresher to 14 years for whom this training was needed. Their trainers had good knowledge on the subject and also has command on verification.
She clarified questions/doubts raised during the training not only on the topic of discussion but also on the relevant topics and provided clear answers which was found to be extremely beneficial to the team. The training was conducted in our office and all the tutorials/labs were set one day in advance before the start day, demonstrating professional quality. Further, the examples and lab exercise were devised brilliantly which conveyed the concept without making it complicated. I wish Maven to have continuous growth and hope that they enhances their capability to cover many more topics in Design and Verification with the same quality.
|SystemVerilog||5 Days||Mar [13 -17], 2017||Registration Closed|
|UVM||3 Days||Mar [20-22], 2017||Registration Closed|
|SystemVerilog||5 Days||Apr [17-21], 2017||Registration Open|
|UVM||3 Days||Apr [24-26], 2017||Registration Open|
|SystemVerilog||5 Days||May [22 – 25], 2017||Registration Open|
|UVM||3 Days||May [29 – 31], 2017||Registration Open|