Free VLSI Workshop - Working Professionals

Workshop Topic: ASIC Verification

Time : 9 AM to 1 PM
Speaker :
Mr. P R Sivakumar , CEO Maven Silicon
Venue :
Maven Silicon

Agenda :

  • Verification Methodology
  • Reusable TB
  • CRCDV - Directed Vs Random
  • Why SystemVerilog?
  • Overview of UVM
  • Case Study: ABLE5 - Aceic's Bluetooth LE VIP
  • Technical Quiz and Gifts


CEO Message

“ I am so glad to utilise this opportunity to interact with you and share my experience. I have personally designed this verification workshop agenda after a long contemplation and I am sure this interactive session will address all your queries about the latest verification trends.

In addition to latest methodologies, I will also explain our product architecture ABLE5 - Aceic's Bluetooth Low Energy 5.0 Verification IP. This will help you to understand 'Why System Verilog and UVM' and how you can accelerate your verification process using latest verification methodologies. So participate, interact and learn from my experience. Also I expect you to share your experience with us. Looking forward to meeting you all during this workshop. “

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