Admission
What are the eligibility criteria for this VLSI course?
To be eligible for the VLSI VM course you would need to tick either of the following :
- BE/BTech graduate and certified in Online VLSI Design Methodologies course from Maven Silicon. Click the link to explore the online course: https://elearn.maven-silicon.com/vlsi-design-course
- BE/Btech graduate with a minimum of one-year work experience in VLSI Design
- BE/Btech/ME/Mtech/MS with very good knowledge in RTL Design and Verilog HDL
What are the prerequisite topics required to join the ASIC Verification Course?
You should know about Digital Electronics and RTL Design using Verilog Coding Concepts to join this VLSI Course. You can also learn these topics through our Online Design Methodologies Program. To explore click on https://elearn.maven-silicon.com/vlsi-design-course
Course Delivery
What is the mode of delivery for this course?
The mode of delivery is Blended. Blended means the best of both worlds, Online and Offline. Our Blended course lets you learn at the comfort and safety of your house. It is specially designed for the working professional to upskill their VLSI Knowledge. This course offers training on Advanced Verilog, SystemVerilog, Universal Verification Methodology, Assertion based Verification along labs, and pilot projects. There will be Live doubt clarification sessions on weekends and pilot projects can be done through online /offline.
What kind of extra support will be given during the course?
Apart from the classroom training, inhouse lab infrastructure,24/7 Lab access through a VPN, hands-on experience on industry standard projects we also support you for any kind of your queries via Whatsapp group.
Can I do the labs and projects from home?
Yes, you can do the labs and projects from home as we provide 24/7 Lab access through a VPN.
Course Information
What is the duration of the part-time VM course?
The duration of the course is 12 weeks designed around weekend classes. Classes would be on Saturday and Sunday at Maven Silicon campus
How can I manage to take this course along with my current job?
The USP of the VLSI VM part-time course is the weekend classes. This course lets you make the best use of your time to upgrade your skills without interrupting your current job.
Fees
When am I supposed to pay the fee?
After your selection for the admission, you are required to block your seat by paying the registration fee in advance. The remaining fee has to be paid on the reporting day of the course.
Infrastructure
Can I bring my laptop?
We are equipped with 250+ laptops/computers to support your learning process. Also, we strictly prohibit the use of your personal laptops/storage device in the premises under the copyright and trademark infringement act.
Placements
Does the VLSI VM part-time course makes me eligible for placements at Maven Silicon?
To get our placement support you can join our job oriented Advanced ASIC Verification course. Click the link to explore https://www.maven-silicon.com/asic-verification
Skill up-gradation
I am working for 2 years in the VLSI domain but still do not understand many concepts completely. How can I become a pro in ASIC verification?
Maven Silicon can definitely help you to bridge the skill gaps. In part-time ASIC Verification Course, you can learn SystemVerilog, UVM, Assertion Based Verification - SVA(SystemVerilog Assertions), Verification Planning and Management, Code and Functional Coverage, Perl scripting language and VIP coding style with simple theory concepts and continuous practice and implementation of the concepts in Labs. This acquired knowledge will make you a pro at work.
I am already working in VLSI Industry for 2 years. How VLSI VM course can help me?
With increasing complexity of chips, engineers are required to enhance their verification skills to advance their career and increase their productivity. We help you learn SystemVerilog and UVM skills at a very fast pace that take years to master in the workplace using our combination of theory classes, hands-on training sessions, projects and assessments.