Verification

Verification Process

Explains the complete verification process. How we verification engineers start off with the verification plan, create testbench and testcases in SystemVerilog, and then finally how we automate the regression testing of the DUT. 

 To learn SystemVerilog in detail, please explore our online verification course at https://elearn.maven-silicon.com/vlsi-verification-systemverilog-uvm. 

  • Sivakumar P R

    Sivakumar P R is the Founder and CEO of Maven Silicon. He is responsible for the company's vision, business, and technology. Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering, academia, and semiconductors for more than 25 years. Before founding Maven Silicon, he worked in the top EDA companies Synopsys, Cadence and Siemens EDA as a verification consultant.

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