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Corporate Training VLSI Courses

Maven Silicon offers immersive and engaging VLSI Courses that ensure learning agility for the engineers to keep pace with the frequent paradigm shifts taking place in the semiconductor industry. With over a decade of domain experience our technical trainers deliver Advanced VLSI Design and Verification Methodologies towards empowering the learners and making them job ready! Our programs are specially designed and tailor made to the ever changing demands and needs of the industry. The learners are equipped with modern EDA Tools , Techniques and Skills that sync with the learning goals of your organization and are vital in an era of rapid change where advances in technology are disrupting the very way they work!

Maven Silicon is one of RISC-V's Global Training Partners. As a centre of excellence in VLSI, we partner and collaborate with top Multinational Semiconductor Organizations and Academia towards not only skilling the New College Graduates (NCGs) but upskilling the professional engineers with appropriate knowledge using contextual teaching and learning based on sound pedagogy. Our VLSI Course Catalog includes SoC & IP - RTL Design and Verification, Languages & Methodologies - Verilog, SystemVerilog, UVM, and DFT, STA, Low Power DV, CDC, Physical Design & Verification.

Using Cloud Environment and State of the Art Technologies we provide a wide range of delivery models through ILT, VILT, Self-Paced Learning to Hybrid Learning that you may choose for engaging your workforce.

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Course Library

RTL Design

VLSI Design Methodologies
(VLSI DM)

VLSI Design Methodologies course is a front end VLSI hands-on course which imparts the VLSI Design Flow, Digital Design and RTL programming using Verilog HDL.

This course starts with an overview of VLSI Design and explains VLSI technology, SoC design, Moore’s law and the difference between ASIC and FPGA. With this overview, it walks you through all the steps of complete VLSI Design flow and explains every step, specification to GDSII, in detail. Then it covers the complete digital design, which includes combinational, sequential, FSM logic designs and memories. And finally it trains you extensively on Verilog HDL programming using various lab exercises and a pilot Verilog RTL project, and makes you a hands-on Verilog RTL designer.

Verilog HDL

This hands-on Verilog course covers the coding for synthesis and simulation. It explains the concept of hardware description language and basic concepts like data types and operators. Then it explains advanced concepts like assignments, procedural blocks, synthesis coding style, FSM coding, and self-checking testbench coding. This course is composed of theory modules, quiz, labs, and pilot project.

It trains you extensively on Verilog HDL programming using various lab exercises and a pilot Verilog RTL project, and makes you a hands-on Verilog RTL designer.

Advanced Digital Design

This advanced Digital Design course covers the complete digital design and static timing analysis. The Digital module explains the concepts of combinational, sequential, FSM logic designs and Memories. It is composed of the modules which explain the concepts of Logic Gates, Adder, Subtractor, Decoder, Encoder, Multiplexer, Demultiplexer, Flipflops, Latches, Counters , Registers, Memories and Finite state machine.

Also, the STA module explains the importance of timing analysis, how to do the timing analysis on both combinational Logic Circuits and Sequential Circuits and the different strategies that one can implement to improve the speed of the logic circuits.

SOC Design

This SoC course explains the Very Large Scale Integration[VLSI] Technology, VLSI Design Flow, SoC Architecture and Design Process. It walks you through all the concepts, VLSI overview, Moore's Law, Why VLSI?, Smart Phone Design with SoC and Application Specific Integrated Circuit Vs Field Programmable Gate Array. And the VLSI Design Flow module explains all the steps of IC design in detail from Specification to GDSII with various examples. This course will make you familiar with the complete chip design process.

RTL Verification

Verification Methodology

This Verification Methodology course starts with a good overview and explains the need of verification, showing how each transformation step of VLSI design flow is verified.

Then it explains the functional verification process, testbench architecture and constraint random coverage driven verification methodology in detail.

Finally, it walks you through all the verification methodologies like linting, code coverage, functional coverage, verification planning & management and Assertion Based verification and gives you a good exposure on how we verify the RTL design thoroughly.

Systemverilog for Verification

This hands-on Systemverilog course explains all the language data types and concepts, especially how we can use all the language features to create a class-based verification environment. It explains all the data types, language features like interfaces, OOP, randomisation, functional coverage, and verification planning and management, and testbench architecture, in detail, and trains you extensively on creating the class-based verification environment using various lab exercises and real time IP and SoC case studies.

Assertion based Verification

This Assertion Based Verification [ SVA ] hands-on course explains the concept of Assertion Based Verification [ ABV ] using SystemVerilog assertions [ SVA ] and how one can verify the DUT protocol or functionality using the same. As part of the course, we will walk you through all the concepts like immediate and concurrent assertions, sequences, implication & repetition operators, writing complex assertions using sequences, etc. and guide you to do all the necessary labs to understand the same.

We use assertions primarily to verify the DUT protocol and functionality. Also, assertions are very powerful in debugging the simulation failures efficiently and verifying the DUT functionality through formal verification technologies too.

Universal Verification Methodology

This UVM hands-on course begins with a good overview of UVM methodology, explaining the concepts like agents and UVCs with various examples like AHB UVCs and SOC UVM testbenches. With this overview it walks you through all the concepts like UVM TB frame work, base class library, factory, sequences, phases, reporting mechanism, TLM ports, virtual sequences, events, call backs, UVCs, Scoreboard, UVM environment, etc and guide you to do the lab exercises to understand all the concepts very well.

Also, this course explains the need and usage of UVM with real time case studies, IP and SoC UVM TBs. With the help of this hands-on course one can learn the nuts and bolts of UVM and grow as a UVM expert in the functional verification domain.

Testing & Timing

Design for testability - DFT

Design For Testability is one of the essential processes in VLSI Design Flow. It is intended to detect the manufacturing defects in a fabricated chip since the fabrication process's yield is never 100%. DFT methodology offers various techniques to increase the efficiency of the silicon testing process of a fabricated chip. This DFT Training course will cover the necessary basics of silicon testing, the importance of testing, and different DFT techniques such as SCAN Insertion, ATPG, JTAG, and BIST.

Also, this course will give the learners a hands-on experience of the implementation of all DFT techniques using the industry-standard tool Tessent from Mentor Graphics. Any Electronics Engineer with a good knowledge of Digital Electronics, RTL Design using Verilog HDL, and moderate programming skills can learn DFT concepts from this course and grow as a DFT Engineer.

Static Timing Analysis - STA

Static Timing Analysis is one of the important processes in ASIC design flow. By performing Static Timing Analysis, the designer can ensure that the design is meeting the timing requirements and it is working at the required clock frequency without setup and hold time violations.

In this course, you will be able to understand the importance of timing analysis, how to do the timing analysis on both combinational Logic Circuits and Sequential Circuits and the different strategies that you can implement to improve the speed of the logic circuits.

This course will help you to understand the concepts of STA from very basic level and gradually take you to an advanced level.

Clock Domain Crossing - CDC

In a Chip/IP with multiple clocks, clock domain crossing occurs whenever data is transferred from a flip-flop driven by one clock to a flip-flop driven by another clock. CDC Signals originate in one clock domain and sampled by registers in a different clock domain. Today’s System on Chip needs multiple clocks with increasing system integration, increasing peripherals & external interfaces and for power management.

This CDC module explains what is Clock Domain Crossing, how to avoid metastability, different kinds of synchronisers and CDC analysis.

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FAQ

How does an organization benefit from your online courses?

The advantage of opting for our online courses is the best use of time and costs. But it offers more to your organization:

  • Personalized with Self-paced Learning
  • Adaptable on Mobiles (Android & iOS)
  • Measurable results and reporting through Certification
  • Hands-on Learning with Labs and Protocol-based Projects
  • Virtual Technical Counselling through Q/A Sessions

Are the courses theoretical only or do you provide practical (hands on) experiences for the learners?

Our complete range of VLSI training courses are hands-on and designed pedagogically with the purpose to enable the learner to acquire the knowledge and apply in a workplace environment. The learners will be equipped with modern EDA Tools to practice Labs and to work on domain specific Protocols, Designs and Interfaces.

Typically, what is the course duration?

The duration of the VLSI training courses varies based on the delivery format you choose

We have a vast array of Modules in RTL Design, RTL Verification, Testing & Timing and Domain specific skills i.e. RISC-V, ARM SoC, Bluetooth, Interfaces: AXI, AHB, APB, SPI, UART.

You can choose ILT (Instructor-Led Training), VILT (Virtual Instructor-Led Training), Online Learning or Hybrid model.

The duration for our regular ILT courses is i.e. SystemVerilog - 5 days, Verilog - 5 Days, UVM - 5 day, whereas the duration of online courses typically ranges from 40-50 hours.

Also, we provide 3/6 months online access for the online courses.

What methods of delivery mode do you offer?

You can choose ILT (Instructor-Led Training), VILT (Virtual Instructor-Led Training), Online Learning (self-paced) or Hybrid Learning Model towards engaging your workforce.

Our newly launched cloud-based online corporate training courses are a highly efficient and cost-effective way to enable your employees to upskill themselves at their own pace and convenience.

Does Maven Silicon provide training solutions for organizations only or can individual professionals also join the program?

Individual professionals can also join our training courses through our web portal:
https://elearn.maven-silicon.com/vlsi-verification

Our Online VLSI courses offer: SystemVerilog, UVM, Verilog, STA, DFT and many more.

Engaged in a job! Yet you can enroll in our Part-time Advanced ASIC Verification Course, and continue learning to enhance and upskill in VLSI.

Click here to explore our Part-time Advanced ASIC Verification Course
https://www.maven-silicon.com/systemverilog-uvm-functional-verification-course

How is Maven Silicon different from other training institutions when offering VLSI courses?

Maven Silicon's VISION is to extend VLSI knowledge to the engineers worldwide by offering High Quality courses with Convenience at Optimum Cost.

Quality:

  • Maven Silicon has highly qualified trainers with vast experience in industry and academia. Their substantial teaching experience gives us an advantage over other training providers.
  • Maven Silicon has been delivering corporate training to Samsung, Qualcomm, IBM, Freescale, Cypress, Broadcom, ST Micro, AMD, LSI, Wipro, and many more.

Convenience:

  • Maven Silicon specializes in tailor-made VLSI training courses that meet your organization's learning objectives. Some of our Corporate VLSI Courses are SystemVerilog HVL, Verilog HDL, Universal Verification Methodology, Assertion based Verification, Domain specific courses – RISC-V, ARM SoC, Bluetooth, Interfaces – AXI, AHB, APB, SPI, UART etc.
  • Our training delivery models range from ILT, VILT, and Online Learning (Self-Paced) to Hybrid Learning.
  • We do extend Onsite Training (ILT) at your Campus.

Cost:

  • Our Corporate Courses are priced reasonably and also available at a optimum price for a high volume of trainees / batch.
  • We have recently launched a wide array of online VLSI courses which are easy on your budget and offer self-paced learning from Industry experts.

If you need any more information related to Maven Silicon's programs/cost, please get in touch with us by completing above Contact Form, accessing the Live Chat service, or calling one of our Support Offices at +91 74064 86555 or Email to sales@maven-silicon.com