RTL coding – Synthesis

Name: Maven Silicon
Brand: Maven Silicon
Rating: 4.7 (1481 reviews)

bySivakumar P R
April 1, 2019
1 minute read
101712 Views

This video explains the concept of logic synthesis, how we produce the digital circuit as a Gate Level Netlist through the EDA tool logic synthesizer, and why the RTL coding style is important for creating synthesizable models. Also, it explains how we create the EDA-independent synthesizable models with a few examples like registers and resource sharing/optimization.

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Sivakumar P R
Mr. P R Sivakumar is the Founder and CEO of Maven Silicon and Aceic Design Technologies, leading vision, strategy, and technology. With over 28 years of experience across academia and the semiconductor industry, he has worked with companies like Synopsys, Cadence, and Mentor Graphics, supporting advanced verification and successful chip tape-outs. He focuses on Verification IPs, consulting, EDA flow development, and corporate training. A thought leader and author, he contributes to industry platforms. He has received multiple honours, including Cadence’s Outstanding Technical Achievement award, and holds a degree in Electrical and Electronics Engineering from Madurai Kamaraj University.