Engaging reads curated by the best VLSI minds in the industry
Our Authors
Sivakumar P R
Sivakumar P R is the Founder and CEO of Maven Silicon. He is responsible for the company's vision, business, and technology. Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering, academia, and semiconductors for more than 25 years. Before founding Maven Silicon, he worked in the top EDA companies Synopsys, Cadence and Siemens EDA as a verification consultant.
Susmita Nayak
Susmita is focused on delivering effective training to the learners in front-end RTL design and Design for Testability and she writes articles that help our readers gain good knowledge on such VLSI topics.
Shanthi V A
Shanthi heads front-end verification training for academic engagements and corporate internships. Her articles reverberate her extensive experience in the semiconductor industry and add value to our VLSI aspirants' careers.
Putta Satish
Putta Satish is in charge of providing expert technical guidance to the internal development team and enabling our learners across all training verticals. His articles help our VLSI aspirants learn and grow their knowledge in various VLSI topics.
sinduja
Sinduja is focused on effective front-end verification training for our learners and her articles provide solid fundamental knowledge for the readers.
Maven Silicon
Hemachandra R Bhat
Mr. Hemachandra R Bhat has over 35 years of experience in VLSI and Embedded Systems, including demonstrated history of the development of AI Products and IT Services. He has expertise in Product Engineering, IC Design, Linux Drivers, Embedded System Design, Robotics platforms based on mobile robots, including drones. He has developed scalable platforms for Robotics and Drones and has 2 patents granted.
Harini Vemu
Akshaya M Ganorkar
Akshaya is a Member Technical Staff at Maven Silicon, with extensive experience in backend VLSI. With 7 years of combined training and academic teaching experience, she is passionate about continuous learning, emerging technologies in the VLSI and semiconductor domain. She is dedicated to fostering innovation and sharing her expertise to help shape the future of VLSI design.
Shwetha A Gangannawar
Basavaraj H
Basavaraj is involved in the front-end design, where responsibility is taken for delivering high-quality training of Digital Design and Verilog HDL. His articles help learners understand how synthesizable RTL is structured and how professional-grade digital designs are developed.
Megha P Patil
Geetha K
Geetha G
Geetha brings over 8+ years of experience in teaching and training to ECE graduates. Her areas of interests are Front-end RTL Design and Design for Testability (DFT). Her passion for VLSI design is reflected in her blogs, where she breaks down complex concepts into simpler ones and provides practical insights for learners in the semiconductor industry.
Naresh Kumar Koppala
K. Naresh Kumar is a passionate VLSI design and verification engineer with 16+ years of experience, including 13 years in academia and 3+ years in industry. He specializes in SystemVerilog, UVM, AMBA protocols (AXI, AHB, APB), and RISC-V IP/SoC verification, and is known for simplifying complex verification concepts through clear, practical teaching. Having trained several hundred learners, he continues to inspire and prepare engineers with strong industry-ready skills and a deep commitment to verification excellence.
Chalam Tirunagari
Chalam is a Verification Engineer dedicated to delivering strong SV, UVM, and RISC-V capabilities. He works on verifying RISC-V IP and SoC-level implementations using frameworks like RISCOF.
Ishita
Raghavendra H
Raghavendra Havaldar focuses on delivering high-quality training in VLSI design and RTL development at Maven Silicon. He has over 18 years of combined industry and academic experience and strong expertise in Verilog, RISC-V architecture, FPGA, GPIO, and AHB-APB protocols. He has played a key role in developing RTL for RISC-V cores and building self-checking testbenches, while also training hundreds of engineering graduates and professionals in frontend VLSI technologies
