All Posts

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  SoC Design

  Privilege Levels in ARM Architecture

  • by  Shanthi V A
  • December 1, 2025
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  Verification

  Why Formal Verification is Essential in Modern Hardware Design

  • by  Naresh Kumar Koppala
  • November 26, 2025
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  Verification

  Breaking Down PCIe: The Silent Force Behind Cutting-Edge Tech

  • by  Chalam Tirunagari
  • November 24, 2025
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  VLSI Industry

  Power-Aware Design and Verification: Building Low-Power, High-Performance Chips

  • by  Raghavendra H
  • November 24, 2025
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  Digital Electronics

  Frequency Division with different Duty Cycles

  • by  Shwetha A Gangannawar
  • November 22, 2025
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  Verification

  Universal Chiplet Interconnect Express (UCIe): Redefining Chiplet Communication

  • by  Chalam Tirunagari
  • November 21, 2025
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  Physical Design

  Challenges in Physical Design at Advanced Nodes (3nm & 2nm)

  • by  Ishita
  • November 20, 2025
• 

  DFT

  SCAN COMPRESSION IN DESIGN FOR TESTABILITY

  • by  Geetha G
  • November 19, 2025
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  VLSI Industry

  The Weekend Degree That’s Changing Careers: Executive MTech in VLSI for Working Professionals in Bangalore

  • by  Maven Silicon
  • September 27, 2025
• 

  VLSI Industry

  From Blocks to Systems: Understanding Chiplets in SoC Design

  • by  Akshaya M Ganorkar
  • September 27, 2025
• 

  Advanced Careers

  Missed Getting Into IIT? Get Trained by IIT Experts with These Top IIT Certification Courses by Maven Silicon & iHUB, IIT Roorkee

  • by  Maven Silicon
  • September 18, 2025
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  VLSI Industry

  Not Just Another MTech: How This Executive MTech in VLSI Design Program Is a Game-Changer for Working Professionals

  • by  Maven Silicon
  • September 15, 2025
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  VLSI Industry

  Design Approaches and Architectures of RISC-V SoCs

  • by  Sivakumar P R
  • September 1, 2025
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  VLSI Industry

  What is routing in VLSI?

  • by  Maven Silicon
  • August 29, 2025
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  Newsletters

  Newsletter July 2025

  • by  Maven Silicon
  • August 26, 2025