SystemVerilog – Class based Verification environment

Sivakumar P R

Mr. P R Sivakumar is the Founder and CEO of Maven Silicon and Aceic Design Technologies, leading vision, strategy, and technology. With over 28 years of experience across academia and the semiconductor industry, he has worked with companies like Synopsys, Cadence, and Mentor Graphics, supporting advanced verification and successful chip tape-outs. He focuses on Verification IPs, consulting, EDA flow development, and corporate training. A thought leader and author, he contributes to industry platforms. He has received multiple honours, including Cadence’s Outstanding Technical Achievement award, and holds a degree in Electrical and Electronics Engineering from Madurai Kamaraj University.