Together Everyone Achieves More
Story Time!
I’m sure most of you must have heard about the age-old story of a hare and tortoise racing against each other which gives us a message that slow and steady wins.
Year: 2020
Rule Book_Email Writing
Emails!
The term doesn’t need an introduction when you are a professional.
A very important medium/channel of communication at.
You should give a damn about your appearance!
We often hear and listen to these lines that “Looks don’t really matter and you should judge a person by his character”.
True a person should be judged by his deeds.
But how about being...
UVM SoC Testbench
This video explains how we reuse the IP level UVM test benches at the SoC [System on Chip] level, reusing the IP level UVM sequences to generate various SoC level.
How to ace a Group Discussion
Group Discussion!
I’m sure all of you must have heard or been a part of this activity as part of your job interview process.
Some of us also really look forward to escaping it or pray for a...
Ethics in business are just a passing fashion?
Professional ethics encompass the personal and corporate standards of behavior.
In the community of skilled and paid workers, the title Professional goes to only a few.
A professional is the on...
How can we model a transaction for the Scoreboard?
We define the transaction mainly based on the DUT [Design Under Test - RTL design] interface for the complete testbench infrastructure[Verification Environment], irrespective of.
SOP Vs POS
Many of you aspiring electronics engineers might be wondering ‘Why do we prefer SOP over POS when it comes to designing a?’.
How do you verify your DUT thoroughly?
It’s not simple as you always assume and misguide others saying, ‘all you need is a great coding skill to write a testbench in SystemVerilog or UVM and the verification job’.
ASIC Verification Trends
The industry uses majorly three kinds of verification technologies:
Dynamic Verification – Simulation
